While hardware resources for computation and data storage are now abundant, economic factors prevent specialized hardware security mechanisms from being integrated into commodity parts. System owners are caught between the need to exploit cheap, fast, commodity microprocessors and the need to ensure that critical security properties hold.
This research will explore a novel way to augment commodity hardware after fabrication to enhance secure operation. The basic approach is to add a separate silicon layer, housing select security features, onto an existing integrated circuit. This 3-D Integration decouples the function and economics of security policy enforcement from the underlying computing hardware. As a result, security enhancements are manufacturing options applicable only to those systems that require them, which resolves the economic quandary. We plan to identify a minimal and realizable set of circuit-level security capabilities enabled by this approach, which can be judiciously controlled by the software layers. This will significantly assist in reducing both the software complexity often associated with security mechanisms and system vulnerabilities.
This research introduces a fundamentally new method to incorporate security mechanisms into hardware and has the potential to significantly shift the economics of trustworthy systems. A broader impact will result through collaborative and educational activities. Graduate and undergraduate student research associates will transfer knowledge to future teachers, researchers and Information Assurance professionals; and project publications will provide direct technical transfer to the embedded-systems and hardware-design communities.