Research Projects
I have a few research projects, and I welcome motivated students who would
like to work on them for individual projects, senior projects, or master's
theses. Many of these projects use PolyCluster,
a new high-performance cluster donated by NSF.
Synchroscalar
Pipelining processors in order to gain higher
clock rates is a very expensive operation in terms of power. A much more
power-efficient solution is to provide parallel resources at lower clock
rates. This is essentially a trade-off between area and power. We proposed
a parallel architecture targeted at embedded computing, namely signal
processing, which provided much of the power savings of ASICs while
retaining much of the programmability of conventional processors.
For more information, see our web site.
PolyScalar digital signal processor simulator, released in assocation
with Synchroscalar.
Fault-Tolerant Computing
This is closely related to reliable
computing. In reliable computing, the goal is to make sure that, even in
the face of errors caused by radiation or other natural phenomenon, the
application executes exactly correctly. The goal is to detect and fix
errors so that the application state is never corrupted. We, instead, are
looking at applications that can tolerate some of these errors. Many
applications that are perceptual, like video, facial recognition, etc.,
can tolerate some inaccuracies in the data but still give the same
(or an acceptable) result. We have quantified the fidelities of many
MiBench and SPEC2000 benchmarks and are currently exploring ways to
exploit this property.
For more information, see our web site.
Nanoscale Networks
As we reach the limitations of silicon-based
computing, new computing fabrics have been proposed. One such computing
substrate is DNA computing. We are working on an architecture that is
highly parallel DNA computation block, with silicon-based computing as
its controller. Currently, we are analyzing the networking properties
of our proposed architecture.